1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to an LCD device and a method for driving the same for generating a reversible image display.
2. Discussion of the Related Art
Recently, various flat panel displays having smaller size and weight than typical cathode ray tube based displays have been developed. Examples of flat panel displays include liquid crystal displays (LCD), field emission displays (FED), plasma display panels (PDP), and light emitting diode (LED) displays.
Among flat panel displays, the LCD is actively used for notebook computers, desktop computers, and mobile terminals because of its characteristic excellent resolution, display of colors, and picture quality.
The LCD displays a picture image by controlling light transmittance of liquid crystal cells using an electric field. The LCD includes an LCD panel having liquid crystal cells, a back light unit for irradiating light onto the LCD panel, and a driving circuit for driving the liquid crystal cells.
The driving circuit includes an integrated circuit (IC) for driving the liquid crystal cells. The LCD is classified as a tape carrier package type, a chip on film type, or a chip on glass (COG) type according to the technology used to connect the IC to the LCD panel.
FIG. 1 illustrates a related art COG type LCD device.
Referring to FIG. 1, the related art COG type LCD device includes an LCD panel 10 provided with pixel cells P formed in pixel regions defined by the crossings of a plurality of gate and data lines GL and DL; data ICs 20 directly mounted on a first side of the LCD panel 10 to supply data signals to the data lines DL; a first flexible printed circuit (FPC) 30 to supply the data signals to the respective data ICs 20; gate ICs 40 directly mounted on a second side of the LCD panel to supply gate pulse signals to the gate lines GL; and a second FPC 50 to supply gate driving signals to the respective gate ICs 40.
The first and second FPCs used to drive the data and gate ICs of the related art COG type LCD device are expensive, and the expense increases the overall cost of the LCD device.
A related art LCD device having a single FPC has been developed to provide a reduced cost solution. The single FPC is connected to a first data IC and second gate IC to reduce the manufacturing cost. A related art LCD device employing a single FPC will be described in detail with reference to FIGS. 2A and 2B.
Referring to FIGS. 2A and 2B, a related art LCD device having a single FPC includes an LCD panel 110 having pixel cells P formed in pixel regions defined by the crossings of plurality of gate and data lines GL and DL; a control board 150 to drive data ICs 120a to 120d and gate ICs 140a and 140b; an FPC 130 connected between the LCD panel 110 and the control board 150; the plurality of data ICs 120a to 120d directly mounted on a first side of the LCD panel 110 and cascaded to supply data signals to the data lines DL; and the plurality of gate ICs 140a and 140b directly mounted on a second side of the LCD panel 110 and cascaded to supply gate pulse signals to the gate lines GL.
The LCD panel 110 includes lower and upper substrates 102 and 104 facing each other and bonded to each other. The FPC 130 is connected to first and second regions of the lower substrate 102, where the first region is formed in the first side of the lower substrate 102 of the LCD panel 110 and the second region is formed on the second side of the lower substrate 102 of the LCD panel 110. The FPC 130 is also connected to the control board 150 through a connector.
The first region includes data COG regions on which the data ICs 120a to 120d are mounted; a plurality of line on glass lines (LOGs) 124 as data lines cascading the data ICs 120a to 120d to the FPC 130; and a plurality of data pads connecting the data ICs 120a to 120d with the data lines DL.
The second region includes gate COG regions on which the gate ICs 140a and 140b are mounted and a plurality of gate LOGs 144 cascading the gate ICs 140a and 140b in cascade to the FPC 130.
The control board 150 includes a timing controller 152 to control the data ICs 120a to 120d and the gate ICs 140a and 140b; a power generator 154 to generate driving power; and a connector to connect the control board to the FPC 130.
The data ICs 120a to 120d are mounted in the data COG regions and are connected in series with the FPC 130 via the data LOGs 124. In addition, the data ICs 120a to 120d sequentially latch cascaded digital data and convert the latched digital data to analog data signals to be supplied to the data lines DL.
The first data IC 120a is supplied with data driving signals, including, data signals, data control signals, and data driving power from the control board 150 through the first data LOGs 124 connected to the FPC 130. The second data IC 120b is supplied with the data driving signals, including, data signals, data control signals, and data driving power from the control board 150 through the FPC 130, the first data LOGs 124, the first data IC 120a and the second data LOGs 124.
The gate ICs 140a and 140b are supplied with the gate driving signals, including, gate control signals and gate driving power from the control board 150 through the gate LOGs 144 connected to the FPC 130. The gate ICs 140a and 140b supply gate pulses that sequentially drive the gate lines GL in response to the gate control signals.
As described above, the related art LCD device is provided with a single FPC connected in cascade to the data ICs 120a to 120d and also connected in cascade to the gate ICs 140a and 140b. In such a related art LCD device, picture quality can vary in all directions depending on the main viewing angles.
For example, in the LCD device for use in a notebook computer, the main viewing angle is in a direction from a point above the upper portion of the screen at a predetermined angle around a direction perpendicular to the screen. On the other hand, in the LCD device for use in public places or public transportation means such as buses, trains and airplanes, the main viewing angle is in a direction from a point below the display at a predetermined angle around a direction perpendicular to the screen. Further, in the LCD device for use in an audio system installed between a driver's seat and a seat next to the driver or in the LCD device for use in display of various kinds of information, the main viewing angle is in a direction from either the left or a right side of the display at a predetermined angle around a direction perpendicular to the screen.
Accordingly, the related art LCD device is manufactured to have a reversible function in all directions depending on its use condition.
A method for driving the related art, single FPC LCD device to display a reversible screen in an image display of the LCD panel 110 will be described with reference to FIG. 2A.
To drive the screen in reverse, the first data control signal, i.e., a first start pulse SSP1 is input to the fourth data IC 120d (the last data IC) through a first data control signal line 126a connected to the last data IC 120d, the data signals input to the data LOGs 124 are latched in the fourth data IC 120d in reverse order starting from the first data signal. Here, the first data control signal line 126a is connected between FPC 130 and the fourth data IC 120d through the data LOGs 124 and the first to the third data IC 120a to 120c. 
Subsequently, once the data signals corresponding to the fourth data IC 120d are all latched the fourth data IC 120d generates a carry signal. The carry signal is then input to the third data IC 120c through a carry signal line 125. Subsequently, the third data IC 120c is enabled by the carry signal to latch the data signals input to the data LOGs 124 in reverse order starting from the next data signals of the data signals latched in the fourth data IC 120d. 
In this way, the data corresponding to one horizontal line are all latched in reverse order from the fourth data IC 120d to the first data IC 120a. The latched data are simultaneously converted into analog data signals, and the converted analog data signals are output to the data lines DL. The reverse order latching operation described above is repeated for each horizontal line, and the latched data is repeatedly converted into analog data signals to be output to the data lines DL.
Further, to drive the LCD panel in reverse, a first gate start pulse GSP1 is input the second gate IC 140b (the last gate IC) through a first gate control signal line 127a. The first gate control signal line 127a is connected between FPC 130 and the second gate IC 140b through the gate LOGs 144 and the first gate IC 140a. The second gate IC 140b and the first gate IC 140a are driven in reverse order in response to the first gate start pulse GSP1. Thus, the gate lines are driven in reverse order from the last gate line to the first gate line.
As described above, the data ICs 120a to 120d latch the data in reverse order and supply the latched data to the data lines DL, and the gate ICs 140a and 140b drive the gate lines in reverse order, so that the LCD panel 110 displays the reversed screen.
A method for driving the related art, single FPC LCD device to display a normal screen as opposed to a reversed screen on the LCD panel 110 will be described with reference to FIG. 2B.
First, when the second data control signal, i.e., a second start pulse SSP2 is input to the first data IC 120a through a second data control signal line 126b, the data signals input to the data LOGs 124 are latched in the first data IC 120a to the fourth data IC 120d in forward order starting from the first data signal.
In this way, the data corresponding to one horizontal line are all latched in the first to fourth data ICs 120a to 120d in forward order. The latched data are simultaneously converted into analog data signals, and the converted analog data signals are output to the data lines DL. The forward latching operation of the first to fourth data ICs 120a to 120d described above is repeated for horizontal line. The latched data is repeatedly converted into analog data signals and the converted signals are output to the data lines DL for each horizontal line.
The gate ICs 140a and 140b are sequentially driven from the first gate line to the last gate line in response to the second gate start pulse GSP2 supplied to the first gate IC 140a through the second gate control signal line 127b. 
As described above, the data ICS 120a to 120d latch the data in forward order and supply the latched data to the data lines DL, and the gate ICs 140a and 140b drive the gate lines in forward order, whereby the LCD panel 110 displays the normal screen.
However, the first data control signal line 126a through which the data driving signals are input to display the reversed screen as shown in FIG. 2A is longer than the second data control signal line 126b to which the data control signals are input to display the normal screen as shown in FIG. 2B. The increased length of the first data control signal line 126a results in increased line resistance causing signal delay resulting in a defective image display.